1. Field of the Invention
The present invention relates to an integrated circuit and fabrication method. More specifically, the present invention relates to an integrated circuit including transistors formed in a plurality of planes overlying a substrate using a graded grain structure to form a semiconductor region between the transistor planes.
2. Description of the Related Art
Polysilicon is deposited as a semiconductor substrate during fabrication of integrated circuits using a chemical vapor deposition (CVD) technique. The structure and properties of polysilicon are determined by CVD characteristics including deposition temperature, and dopant type and concentration. The structure and properties of polysilicon are also determined by thermal cycling operations performed subsequent to chemical vapor deposition. Typical polysilicon deposition processes are performed at a temperature range from approximately 600.degree. C. to 650.degree. C. Deposition is made from a silane (SiH.sub.4) silicon source, generally either a 100% silane source or silane in combination with nitrogen (N.sub.2) or hydrogen (H.sub.2) gas streams. At temperatures below 580.degree. C. the as-deposited film is amorphous. At temperatures above 580.degree. C. the films deposit as polycrystalline silicon with formation of small pockets called crystallites or grains of single-crystalline silicon separated by grain boundaries. Polysilicon having a crystallite structure is commonly called columnar polysilicon.
The crystals in polysilicon deposit in a preferred orientation which depends on the deposition temperature. At temperatures in the range from 580.degree. C. to 600.degree. C., a {311} preferred orientation is produced. The polycrystalline silicon is dominated by crystals with a {110} fiber axis with columnar grains for temperatures in the 625.degree. C. range while a {100} orientation predominates in the 675.degree. C. range.
Amorphous polysilicon films are recrystallized at temperatures from 500.degree. C. to 1000.degree. C. and tend to produce a crystalline structure having a strong {111} fiber texture. The texture and grain size are highly reproducible in polysilicon films that are crystallized from amorphous phase films, producing a grain size that is generally larger than the grain size of as-deposited films. As-deposited amorphous films tend to have a smoother surface than films grown at less than about 580.degree. C. which occasionally have rough surfaces and films grown at 620.degree. C. which always have a rough surface. The smooth surface of as-deposited amorphous polysilicon films is maintained even after annealing at temperatures from 900.degree. C. to 1000.degree. C. The smooth surface of an as-deposited amorphous film is attained at the expense of a slower deposition rate at a temperature of 580.degree. C.
In addition to temperature, deposition and processing parameters including source concentration, pump speed, nitrogen flow, and other gas flows determine the deposition rate and grain size. For example, application of hydrogen (H.sub.2) in the gas stream advantageously reduces the occurrence of surface impurities and moisture which in turn results in a reduced grain size. Moisture or oxygen impurities cause growth of silicon dioxide within the polysilicon, increasing the resistance of the polysilicon and increasing etchability in subsequent masking steps.
The presence of dopants in the gas stream influence the grain size. Typically a strip of polysilicon is used in integrated circuits to function as a conductor. Doping is used to decrease resistivity of the polysilicon.
The quality of polysilicon in terms of characteristics including grain size and grain boundary consistency determines the electrical performance of devices constructed in the polysilicon based on the electrical current flow characteristics of the films. Current resistance arises as electrical current crosses grain boundaries in the polysilicon with larger grain boundaries being associated with a higher resistance. The fabrication of integrated circuits having a consistent current flow from device to device and within a device depends on control of the polysilicon structure.
One problem that arises in the fabrication of integrated circuits is that a high quality polysilicon is needed to built transistors and devices have suitable performance. Unfortunately the deposition rate of high quality amorphous polysilicon is too low, often on the order of 15 to 20 .ANG. per minute so that the deposition polysilicon layers of suitable thickness, for example 1000 to 5000 .ANG., requires a processing time of 50 minutes to about five hours. This deposition time is too long to fabricate integrated circuits with an effective throughput and a reasonable cost.
What is needed is a polysilicon structure and deposition technique that achieves a suitable deposition rate and fabrication throughput.